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{\Large Collaborative Research: Design Methodologies and Circuit Techniques for Emerging Non-Volatile Memories}\\
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{\large  PROJECT SUMMARY} \\
%{Hai Li (NYU-Poly) and Yuan Xie (Penn State)}
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Technology scaling of SRAM and DRAM (which are the common memory technologies used in traditional memory hierarchy) are increasingly constrained by fundamental limits. Emerging non-volatile memory (NVM) technologies, such as \textit{Phase-change RAM (PCRAM)}, \textit{Magnetic RAM (MRAM)},  \textit{Resistive RAM (RRAM)} and \textit{Memristor}, are being explored as potential alternatives of existing memories in future computing systems. Such NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, and hence, become very attractive as the future universal memories.
As such emerging memory technologies are getting mature, it is important for circuit designers to understand their pros and cons, refine and/or create new design techniques, and optimally exploit them to significantly improve the performance/power/reliability. \textit{The main objective of this project is to offer design methodologies and circuit techniques for emerging non-volatile memory technologies, and to study the design implications on future memory hierarchy architecture designs.}

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{\flushleft{\bf Intellectual Merit}}:
To explore new design opportunities that these emerging memory technologies can bring to designers,  this project involves two research tasks including \emph{design methodologies} and \emph{circuit techniques}, to study the implication of such NVM technologies on future computing system designs: (1) We propose to study the device modeling and analysis methodologies for emerging NVMs, and develop a memory design and optimization flow to facilitate design space explorations; and (2) based on the NVM models, we then investigate circuit design techniques to improve the reliability (including lifetime improvement and variation mitigation), yield, and density for emerging memory technologies. The proposed research takes a holistic design perspective with close collaboration between two PIs with complementary expertise, and with close partnerships with industry collaborators, aiming at accelerating the adoption of emerging NVMs for future VLSI circuit design.

The key \textit{\textbf{transformative aspect}} of the proposed research is that, the success of the project will result in innovations in memory design techniques, accelerating commercializations of emerging non-volatile memory technologies, and potentially leading to better performance, higher energy-efficient, and more reliable computer systems.

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{\flushleft{\bf Broader Impacts}}: The research will be conducted in collaboration with our industrial partners, including HP, IBM, Intel, Seagate, Qualcomm, and IMEC. Through close collaboration with several industry partners, we envision direct transfer of many ideas to industry. The outcome of this research will, therefore, have a direct impact on future computing systems. Undergraduate and graduate students involved in this research will get versatile training in several areas to prepare them for the next-generation IT workforce. We will actively seek under-represented students to participate in this project. We plan to develop a new graduate-level course on emerging non-volatile memories offered simultaneously at Penn State and NYU-Poly. The course will provide students a spectrum of inter-related issues from technology, device, to circuit and architectures. The design methodologies and circuit techniques developed in this research will be used in developing this new course. Finally, the device models and design flow developed in this research will be made available through our web-sites for use by other educators, researchers, and industry practitioners. We will also organize tutorials along with major conferences to disseminate the results from this work.

\paragraph{\textbf{Key Words:}} non-volatile memories; memory design; memory modeling and analysis; design methodology; emerging technology

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